Install this package:
emerge -a sci-electronics/iverilog
If the package is masked, you can unmask it using the autounmask tool or standard emerge options:
autounmask sci-electronics/iverilog
Or alternatively:
emerge --autounmask-write -a sci-electronics/iverilog
| Version | EAPI | Keywords | Slot |
|---|---|---|---|
| 9999 | 8 | ~amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86 | 0 |
| 13.0 | 8 | ~amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86 | 0 |
| 12.0-r1 | 8 | amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86 | 0 |
<pkgmetadata> <maintainer type="person" proxied="yes"> <email>vowstar@gmail.com</email> <name>Huang Rui</name> </maintainer> <maintainer type="project"> <email>sci-electronics@gentoo.org</email> <name>Gentoo Electronics Project</name> </maintainer> <maintainer type="project" proxied="proxy"> <email>proxy-maint@gentoo.org</email> <name>Proxy Maintainers</name> </maintainer> <longdescription> Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-2001. </longdescription> <upstream> <remote-id type="github">steveicarus/iverilog</remote-id> </upstream> </pkgmetadata>
| Type | File | Size | Versions |
|---|---|---|---|
| DIST | iverilog-13.0.tar.gz | 3215392 bytes | 13.0 |
| Type | File | Size |
|---|---|---|
| DIST | iverilog-12.0.tar.gz | 2995096 bytes |