sci-electronics/verilator (guru)

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Install

Install this package:

emerge -a sci-electronics/verilator

Package Information

Description:
Verilator, the fastest Verilog/SystemVerilog simulator. Accepts Verilog or SystemVerilog. Performs lint code-quality checks. Compiles into multithreaded C++, or SystemC. Creates XML to front-end your own tools.
Homepage:
https://verilator.org https://github.com/verilator/verilator
License:
|| ( Artistic-2 LGPL-3 )

Versions

Version EAPI Keywords Slot
9999 8 ~alpha ~amd64 ~arm ~arm64 ~hppa ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86 0
5.050 8 ~alpha ~amd64 ~arm ~arm64 ~hppa ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86 0

Metadata

Description

Maintainers

Upstream

Raw Metadata XML
<pkgmetadata>
	<maintainer type="person">
		<email>vowstar@gmail.com</email>
		<name>Huang Rui</name>
	</maintainer>
	<longdescription lang="en">
		Verilator, the fastest Verilog/SystemVerilog simulator. Accepts Verilog
		or SystemVerilog. Performs lint code-quality checks. Compiles into
		multithreaded C++, or SystemC. Creates XML to front-end your own tools.
	</longdescription>
	<longdescription lang="zh">
		Verilator,最快的 Verilog/SystemVerilog 模拟器。支持 Verilog 和
		SystemVerilog。执行 lint 代码质量检查。可编译为多线程 C++ 或
		SystemC。生成 XML 以对接您自己的工具。
	</longdescription>
	<upstream>
		<remote-id type="github">verilator/verilator</remote-id>
	</upstream>
</pkgmetadata>

Lint Warnings

USE Flags

Manage flags for this package: euse -i <flag> -p sci-electronics/verilator | euse -E <flag> -p sci-electronics/verilator | euse -D <flag> -p sci-electronics/verilator

Flag Description 9999 5.050
debug Debug build to collect logfiles ⚠️
test Run mangohud tests ⚠️

Manifest

Type File Size Versions
DIST verilator-5.050.tar.gz 6339575 bytes 5.050
Unmatched Entries
Type File Size