USE_EXPAND: cpu_flags_arm

Flags in cpu_flags_arm

Flag Description Packages Using This Flag
aes Use the AES cryptography instruction set View specific flag page (cpu_flags_arm_aes)
asimd Use the Advanced SIMD instructions (NEON with ARMv8 extensions) View specific flag page (cpu_flags_arm_asimd)
asimddp Use the Advanced SIMD dot product instructions View specific flag page (cpu_flags_arm_asimddp)
asimdfhm Use the Advanced SIMD single- & half-precision multiply View specific flag page (cpu_flags_arm_asimdfhm)
asimdhp Use the Advanced SIMD half-precision & vector arithmetics View specific flag page (cpu_flags_arm_asimdhp)
crc32 Use the CRC32 instruction set View specific flag page (cpu_flags_arm_crc32)
edsp Use the enhanced DSP instructions (ARMv*E and ARMv6+) View specific flag page (cpu_flags_arm_edsp)
i8mm Use the AArch64 Int8 matrix multiplication instructions View specific flag page (cpu_flags_arm_i8mm)
iwmmxt Use the iwMMXt instruction set View specific flag page (cpu_flags_arm_iwmmxt)
iwmmxt2 Use the iwMMXt2 instruction set View specific flag page (cpu_flags_arm_iwmmxt2)
neon Use the NEON instruction set View specific flag page (cpu_flags_arm_neon)
neon-fp16 Use the NEON intruction set with half word loads / store support View specific flag page (cpu_flags_arm_neon-fp16)
sha1 Use the SHA-1 cryptography instruction set View specific flag page (cpu_flags_arm_sha1)
sha2 Use the SHA-2 cryptography instruction set View specific flag page (cpu_flags_arm_sha2)
sm4 Use the SM4 cryptography instruction set View specific flag page (cpu_flags_arm_sm4)
sve Use the Scalable Vector Extension instruction set View specific flag page (cpu_flags_arm_sve)
sve2 Use the Scalable Vector Extension 2 instruction set View specific flag page (cpu_flags_arm_sve2)
thumb Enable Thumb instruction set (ARMv*T and ARMv6+) View specific flag page (cpu_flags_arm_thumb)
thumb2 Enable Thumb-2 instruction set (ARMv*T2 and ARMv7+) View specific flag page (cpu_flags_arm_thumb2)
v4 Use instructions added in ARMv4 View specific flag page (cpu_flags_arm_v4)
v5 Use instructions added in ARMv5 View specific flag page (cpu_flags_arm_v5)
v6 Use instructions added in ARMv6 View specific flag page (cpu_flags_arm_v6)
v7 Use instructions added in ARMv7 View specific flag page (cpu_flags_arm_v7)
v8 Use instructions added in ARMv8 View specific flag page (cpu_flags_arm_v8)
vfp Use the VFP version 2 instruction set View specific flag page (cpu_flags_arm_vfp)
vfp-d32 Indicate that the FPU has 32 64-bit VFP (v3+) registers (16 otherwise) View specific flag page (cpu_flags_arm_vfp-d32)
vfpv3 Use the VFP version 3 instruction set View specific flag page (cpu_flags_arm_vfpv3)
vfpv4 Use the VFP version 4 instruction set View specific flag page (cpu_flags_arm_vfpv4)