Gentoo Packages

USE_EXPAND: cpu_flags_x86

Gentoo Packages > USE_EXPAND Flags > cpu_flags_x86

Description for cpu_flags_x86

# Copyright 1999-2025 Gentoo Authors

# Distributed under the terms of the GNU General Public License v2

# Whenever the flag name does not correspond to /proc/cpuinfo flags,

# please put the cpuinfo flag in square brackets. If more than one flag

# is specified, any of them will enable the respective USE flag.

Flags in cpu_flags_x86

Flag Description Packages Using This Flag
3dnow Use the 3DNow! instruction set View specific flag page (cpu_flags_x86_3dnow)
3dnowext Use the Enhanced 3DNow! instruction set View specific flag page (cpu_flags_x86_3dnowext)
aes Enable support for Intel's AES instruction set (AES-NI) View specific flag page (cpu_flags_x86_aes)
amx_bf16 Use Advanced Matrix Extensions tile computational operations on bfloat16 numbers View specific flag page (cpu_flags_x86_amx_bf16)
amx_int8 Use Advanced Matrix Extensions tile computational operations on 8-bit integers View specific flag page (cpu_flags_x86_amx_int8)
amx_tile Use Advanced Matrix Extensions tile architecture support View specific flag page (cpu_flags_x86_amx_tile)
avx Adds support for Advanced Vector Extensions instructions View specific flag page (cpu_flags_x86_avx)
avx2 Adds support for Advanced Vector Extensions 2 instructions View specific flag page (cpu_flags_x86_avx2)
avx512_4fmaps Use AVX-512 Fused Multiply-Accumulate Packed Single Precision instruction set View specific flag page (cpu_flags_x86_avx512_4fmaps)
avx512_4vnniw Use AVX-512 Vector Neural Network Instructions Word Variable Precision View specific flag page (cpu_flags_x86_avx512_4vnniw)
avx512_bf16 Use AVX-512 BFloat16 instruction set View specific flag page (cpu_flags_x86_avx512_bf16)
avx512_bitalg Use AVX-512 Bit Algorithms instruction set View specific flag page (cpu_flags_x86_avx512_bitalg)
avx512_fp16 Use general-purpose numeric operations for 16-bit half-precision instruction set View specific flag page (cpu_flags_x86_avx512_fp16)
avx512_vbmi2 Use AVX-512 Vector Bit Manipulation Instructions 2 View specific flag page (cpu_flags_x86_avx512_vbmi2)
avx512_vnni Use vector neural network instructions for 8- and 16-bit multiply-add operations View specific flag page (cpu_flags_x86_avx512_vnni)
avx512_vp2intersect Use AVX-512 Intersect instruction set View specific flag page (cpu_flags_x86_avx512_vp2intersect)
avx512_vpopcntdq Use AVX-512 Vector Population Count Doubleword and Quadword instruction set View specific flag page (cpu_flags_x86_avx512_vpopcntdq)
avx512bw Use AVX-512 byte- and word instructions View specific flag page (cpu_flags_x86_avx512bw)
avx512cd Use AVX-512 conflict detection instructions View specific flag page (cpu_flags_x86_avx512cd)
avx512dq Use AVX-512 double- and quad-word instructions View specific flag page (cpu_flags_x86_avx512dq)
avx512er Use AVX-512 exponential and reciprocal instructions View specific flag page (cpu_flags_x86_avx512er)
avx512f Adds support for AVX-512 Foundation instructions View specific flag page (cpu_flags_x86_avx512f)
avx512ifma Use AVX-512 Integer Fused Multiply-Add instruction set View specific flag page (cpu_flags_x86_avx512ifma)
avx512pf Use AVX-512 prefetch instructions View specific flag page (cpu_flags_x86_avx512pf)
avx512vbmi Use AVX-512 vector byte manipulation instructions View specific flag page (cpu_flags_x86_avx512vbmi)
avx512vl Use AVX-512 vector-length instructions View specific flag page (cpu_flags_x86_avx512vl)
avx_vnni Use AVX (VEX-encoded) versions of the Vector Neural Network Instructions View specific flag page (cpu_flags_x86_avx_vnni)
bmi1 Enable the first group of advanced bit manipulation extensions (ANDN, BEXTR, BLSI, BLSMSK, BLSR, TZCNT) View specific flag page (cpu_flags_x86_bmi1)
bmi2 Enable the second group of advanced bit manipulation extensions (BZHI, MULX, PDEP, PEXT, RORX, SARX, SHLX, SHRX) View specific flag page (cpu_flags_x86_bmi2)
f16c Adds support for F16C instruction set for converting between half-precision and single-precision floats View specific flag page (cpu_flags_x86_f16c)
fma3 Use the Fused Multiply Add 3 instruction set ([fma] in cpuinfo) View specific flag page (cpu_flags_x86_fma3)
fma4 Use the Fused Multiply Add 4 instruction set View specific flag page (cpu_flags_x86_fma4)
mmx Use the MMX instruction set View specific flag page (cpu_flags_x86_mmx)
mmxext Use the Extended MMX instruction set (a subset of SSE) ([mmxext] or [sse] in cpuinfo) View specific flag page (cpu_flags_x86_mmxext)
padlock Use VIA padlock instructions ([phe] in cpuinfo) View specific flag page (cpu_flags_x86_padlock)
pclmul Use Carry-less Multiplication instructions ([pclmulqdq] in cpuinfo) View specific flag page (cpu_flags_x86_pclmul)
popcnt Enable popcnt instruction support ([abm] or [popcnt] in cpuinfo) View specific flag page (cpu_flags_x86_popcnt)
rdrand Use the RDRAND instruction for generating random numbers View specific flag page (cpu_flags_x86_rdrand)
sha Use the SHA-NI instruction set View specific flag page (cpu_flags_x86_sha)
sse Use the SSE instruction set View specific flag page (cpu_flags_x86_sse)
sse2 Use the SSE2 instruction set View specific flag page (cpu_flags_x86_sse2)
sse3 Use the SSE3 instruction set ([pni] in cpuinfo, NOT ssse3) View specific flag page (cpu_flags_x86_sse3)
sse4_1 Enable SSE4.1 instruction support View specific flag page (cpu_flags_x86_sse4_1)
sse4_2 Enable SSE4.2 instruction support View specific flag page (cpu_flags_x86_sse4_2)
sse4a Enable SSE4a instruction support View specific flag page (cpu_flags_x86_sse4a)
ssse3 Use the SSSE3 instruction set (NOT sse3/pni) View specific flag page (cpu_flags_x86_ssse3)
vpclmulqdq Use Vector Carry-Less Multiplication of Quadwords instruction set View specific flag page (cpu_flags_x86_vpclmulqdq)
xop Enable the XOP instruction set View specific flag page (cpu_flags_x86_xop)